21.12.2013 18:31

It is that season again that makes power-hungry notebooks double as lap warmers and is conductive to large hacker Congresses in the north. Before I go catch this year's last few deadlines, attend festivities with my family and then lose myself among the blinkenlights in Hamburg, I thought I might join the custom of writing a personal year review.

Well, it's been an unusual year.

If anything has marked it for me it has been travel around Europe. I am pretty sure that I did more kilometers by plane, car or train than in any other single year in my life. If I count only longer trips, I've been to Athens, Brussels, Cologne, Ghent, Ilmenau, Ludwigsburg, Munich, Paris and more places in northern Great Britain than I can remember. I visited most of these places because of my job at the Institute, others for less formal meetups or simply running away from it all for a while.

The list would even be one city longer if I weren't rushed to surgery at one point which left me grounded and limited to the neighborhood of my doctor's office for a month or so.

Maybe because of travel or other things, I found it hard to concentrate on any really important thing this year. I've noticed that my context switches are getting longer. I can hardly work on two serious projects on two consecutive days. Since this is hardly compatible with looming deadlines and overflowing lists of tasks it has led to a lot of frustration and burn out on my part. If it's an effect of trying to focus on harder problems now, it sure feels often like I'm just wasting time on unimportant details.

The Slovenian Open Data group has been a most welcome source of motivation when all other things seemed to move in a wrong way. It's incredibly inspiring to talk with people honestly doing their best to improve the world.

It's been the year when Kiberpipa was shut down and when I more or less lost contact with the Computer Museum.

A new Debian was released which in one way or another broke many work flows I have been using for years. It left a strong impression that desktop software is slowly going the way of the dodo. Together with the continuing confirmations of surveillance on the Internet it has contributed significantly to the feeling of impending doom and doubts regarding where technology is headed today.

Perhaps because of that I also spent more time than I want to admit on pastel colored cartoon ponies. Even though I occasionally fear that this subculture is all a massive viral marketing campaign it's been at times weirdly fascinating to explore. It was a fun way to forget more serious things for a while. It got me to experiment with drawing and writing fiction which was an interesting new experience, even if most of what I made is laughably unoriginal or has been described as too depressing.

"You're discussing cartoons while your country is falling apart" was a comment I once heard that probably contains more truth than I would wish and maybe sums it all up pretty well. 2013 for me has been mostly about vastly more ideas than time and energy to properly implement them and no good way to select that one idea out of nine that would be worth focusing on.

Posted by Tomaž | Categories: Life | Comments »

TDA18219HN signal distortion

10.12.2013 19:34

I've been writing previously about some AGC problems I noticed with the NXP TDA18219HN tuner chip. Here is how they look like in practice.

Below is the TDA18219HN intermediate frequency output signal captured with an oscilloscope. There is a -60 dBm, 783.1 MHz constant wave on the tuner's antenna input. Channel filter is set to 8.0 MHz bandwidth. Tuner has a balanced IF output, so yellow trace shows non-inverted pin IFP, blue trace shows inverted pin IFN and orange trace shows IFP - IFN. The signal is as expected at this point, with no visible non-linear distortions. The integrated automatic gain control keeps the signal peak-to-peak amplitude at around 400 mV regardless of the input level.

TDA18219HN output with 8 MHz filter, -60 dBm input signal.

The following capture is from the same setup, except channel filter is set to 1.7 MHz. The input frequency was also lowered to 780 MHz to keep the frequency at the IF stage approximately the same. There's a severe signal distortion at this point. Note that the signal level is also higher now (this screenshot was made at 500 mV/div compared to 200 mV/div in the other two pictures). The triangular shapes make me think that the slew rate limit of some amplifier stage has been reached.

TDA18219HN output with 1700 kHz filter, -60 dBm input signal.

When input level is lowered to -75 dBm the distortion dissappears:

TDA18219HN output with 1700 kHz filter, -75 dBm input signal.

The new TV band receiver for VESNA will have an external channel filter anyway, so this isn't such a problem. I'll simply run the tuner using the 8 MHz setting and rely on the external filter to reduce the IF bandwidth further.

If it's really a bug in the hardware and not some artifact of my own circuit, I'm guessing that this setting wasn't well tested in production since it's not commonly used for DVB-T transmissions. A note in the datasheet about it would be nice though.

Posted by Tomaž | Categories: Analog | Comments »

VESNA ADC resolution

07.12.2013 18:00

Working on the new UHF receiver, I wanted to quantify the amount of noise that VESNA's A/D converter will contribute to the total noise of the receiver. This is one of two noise sources I cannot influence (the other being the TDA18219 RF front-end). Knowing the approximate performance of the ADC helped me when choosing other components in the signal chain, since I wanted them not to significantly affect the total amount of noise in the system.

VESNA's STM32F103 microcontroller has 12-bit A/D converters with a 3.3 V reference voltage. In theory they should be accurate to the least-significant bit. Amplitude of the quantization noise is therefore:

\hat u_Q = \frac{3.3V}{2^{12} - 1} = 0.80 \mathrm{mV}

Here's a practical measurement at 2 Msamples/s. The setup was the same as with my high-frequency test, except that the input was grounded with a 50Ω terminator instead of connected to a signal generator:

Histogram for a grounded VESNA ADC input.

The histogram of the samples looks nicely like a Gaussian distribution. Calculating the standard deviation gives directly the RMS value of the noise:

\sigma = 0.74
u_{noise} = \sigma \frac{3.3 V}{2^{12}-1} = 0.60 \mathrm{mV}

Comparing to the largest possible signal RMS value:

u_{signal} = \frac{ 3.3 \mathrm{V} }{2\sqrt{2}} = 1200 \mathrm{mV}

So given these values the best signal to noise ratio achievable is:

SNR = 66 \mathrm{dB}

Resulting in effective resolution of 10.9 bits (SNR for an ideal 12 bit converter is 72 dB). A metric like SINAD would more accurately describe the capability of VESNA's ADC for capturing modulated signals, but I think this estimate was good enough to give me an idea of how much freedom I had in choosing a channel filter implementation.

Having done this measurement, another metric can also be calculated, which might be interesting to know. VESNA'S ADCs are mostly used for reading analog sensors. Those are basically DC signals and there the peak-to-peak resolution is a better indicator of ADC performance (as this application note explains).

N_{pp} = \log_2 \frac{2^{12}-1}{6.6 \sigma} = 9.7 \mathrm{bits}

So out of 12 bits you only get 9 most-significant bits without flicker. However, for reading slow-moving sensors you might probably want to use some slower ADC mode with longer sampling time. That might integrate away some of the noise and provide a better resolution.

Posted by Tomaž | Categories: Analog | Comments »

UHF receiver redesign

03.12.2013 16:10

I'm currently in the middle of designing a new version of the UHF receiver for VESNA sensor nodes. It has been over a year and a half since I designed the first version. In this time I learned a lot about spectrum sensing and so I now have a much better understanding of the state of the art in this field. It has been obvious for quite a while that the design needs to be upgraded in order to keep up with the latest research.

In this time also came to know the capabilities of the VESNA platform much better and can now work on a design that will have a much better match between what is done in hardware and what can be left to digital signal processing in software. The whole idea is to keep it as flexible as possible while staying compatible with low-powered systems like VESNA (and not go for a full-blown software-defined radio approach).

Unfortunately, this project of mine has been taking way too long, with work-related and personal things interfering at the most inconvenient times. Right now I'm optimistic that I will have the hardware design finalized by the end of the year.

Last Friday I should have had a presentation on the topic of the UHF receiver redesign for our research group at the Institute. Sadly I had to cancel, but I am now publishing the slides I prepared for it here.

SNE-ESHTER block diagram slide.

Get the slides in the PDF format.

Posted by Tomaž | Categories: Life | Comments »