Down time

21.07.2014 21:14

You might have noticed that for the past two days or so this website was off-line. The reason for it is a bit curious.

On Friday, 18 July at 17:45, two of my Ethernet switches failed - one in Logatec and one in Ljubljana, separated by around 35 km. They crashed simultaneously at the exactly the same second.

Here are the relevant log entries of two machines connected to them. Both had clocks synchronized via NTP, so the time stamps should be fairly accurate. The machines logged these messages when their Ethernet adapters reported the loss of carrier signal on the cable from their respective switches:

Jul 18 17:45:21 gildedale kernel: [1658547.286187] PHY: sunxi_gmac-0:00 - Link is Down
Jul 18 17:45:21 chandra kernel: [512418.004319] e100 0000:00:0c.0: eth3: NIC Link is Down


These two pieces of equipment were geographically separated and had nothing in common. As far fetched as it seems that they would fail because of a common reason, this appears to be the case here.

Newspapers reported on Friday afternoon that a small explosion occurred at a transformer station in Ljubljana. The distribution company confirms the event, but doesn't share many details. There is also no official source of the exact time, but the first tweet about it appeared at 17:45.

I guess that whatever occurred at the transformer station caused a transient on the power grid that crashed my switches. It must have been fairly short because two other computers that were connected to the same outlet did not reboot or report any problems.

It's curious that this effect threw both of the switches in a state where they didn't reboot, but didn't function either. One of these is a fairly old, low-cost affair that I have seen behave in this way a few times before. The other one is integrated into a Linksys WRT54GL access point that has been fairly reliable so far.

This is the second time this year that something completely unexpected happened with my servers. It's not that I try to run some kind of high-reliability shop, but it is annoying and makes me appreciate the work real system administrators do each day. I guess that's the cost of trying to stay away from the cloud these days.

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Kickstarting failure

16.07.2014 17:37

Yesterday I stumbled upon the list of supposedly life-changing Kickstarter projects that hovered briefly on the front page of Hacker News. While I receive a regular stream of links to more or less feasible crowd-funding projects through various channels of modern communication, this list caught my eye as being particularly full of far fetched, if not down-right fraudulent proposals.

After skimming through a campaign for electric vehicles, written by someone who doesn't know the difference between energy and power, I stopped for a moment on Shawn West's 30-second rechargeable battery. He is asking for $10.000 to build a replacement for ordinary rechargeable batteries using a super capacitor for energy storage instead of an electrochemical cell. Image by Shawn West Let's consider for a moment his claims: he says that his patent-pending battery using a lithium-ion super capacitor is roughly equivalent to a typical rechargeable battery. He shows us an AA-sized prototype that supposedly contains two integrated circuits: a voltage regulator and a protective circuit that prevents the capacitor from being over- or under-charged. In the FAQ he mentions that the capacity of his battery is 1150 mAh. Unsurprisingly, on all of his pictures the capacitor is placed in such a way that the model or capacity rating isn't visible. However, with some image enhancement, it's just possible to read out "YUDEN" on one of the photographs. Taiyo Yuden is in fact a manufacturer of lithium-ion capacitors. Looking through their super capacitor range, there is actually just one model that would fit within the 14 x 50 mm AA sized battery: the 40 farad, 12 x 35 mm cylinder-type LIC1235R3R8406. Here are its specifications: C_{cap} = 40 \mathrm{F} U_{max} = 3.8 \mathrm{V} U_{min} = 2.2 \mathrm{V} Let's do some back-of-the envelope calculations: That tiny chip on the circuit board looks like a low-drop linear regulator. In that case, the capacity of the battery given in milliampere-hours is equal to the change in electric charge between the fully charged and fully discharged capacitor (ignoring quiescent current of the regulator): C_{bat} = \Delta Q = Q_{max} - Q_{min} = C_{cap} \cdot (U_{max} - U_{min}) C_{bat} = 17.8 \mathrm{mAh} That's barely 1.5% of the claimed capacity! If we consider for a moment that his circuit actually contains a switching regulator, the situation improves, but only slightly. Given 100% conversion efficiency, the energy that can be extracted from the battery is now equal to the change in electric field energy between the fully charged and fully discharged capacitor: \Delta W = \frac{C_{cap}}{2}\left(U_{max}^2 - U_{min}^2\right) \Delta W = 192 \mathrm{J} Since the inventor claims that his battery does not have a discharge curve, but puts out a steady Ubat = 1.5 V, we can simply convert the energy rating to capacity: C_{bat} = \frac{\Delta W}{U_{bat}} C_{bat} = 35.6 \mathrm{mAh} Obviously, this is much better than the dissipative case above, but the figure is still more than one order of magnitude off from the Kickstarter campaign claim of 1150 mAh. Even giving the author the benefit of doubt and using the largest capacitor from Taiyo Yuden's super capacitor range, the achievable capacity remains much smaller than your vanilla pink-bunny-never-stops alkaline. Super capacitors are a fascinating component and they certainly have their uses. I kind of like the idea of packaging one into a alkaline battery casing, especially the exposed ring that is used to by-pass the regulator for fast charging. However the claims that this could be used to power your smart phone are ridiculous. Crowd-funding seems to fuel a big part of the broader-Internet fascination with hardware start-ups these days. I can't help but think that projects with claims that are not challenged in even one of the overly-enthusiastic let's-disrupt-the-industry comments are doing more harm than good to our field. Posted by | Categories: Analog | Comments » Remembrance 08.07.2014 22:06 Back in my childhood I used to spend a lot of time at my grandparent's cottage. It was a wooden house amid a small orchard, just under the top of a hill outside of Ljubljana. My parents would often drive me there in a red Zastava 101 on weekends and holidays. I played with surplus plumbing parts and old tools that were lying around, slept in the attic and had nightmares from having to go to the outhouse after dark. The cottage was designed and built by my grandfather as a weekend retreat. He was a mechanical engineer who moved to Ljubljana with my grandmother to one of the first apartment complexes in the city, proudly displaying his professional title above the door bell. He was designing turbines for hydroelectric power plants at the heavy machinery manufacturer Litostroj. When I wasn't wasting potable water or setting things on fire, one of my favorite ways of spending time there was browsing through a book Elektrotehnika v slikah. I could always find it stashed between two planks above my grandfather's bed. It was bound into a hard crimson cover with gold lettering and even back then already had the smell of an old paperback. The title translates to English as Electrical engineering in pictures and it's actually a Slovenian translation of the German original Elektrotechnik in Bildern by Gustav Büscher. I don't know how that book got there. I doubt that my grandfather learned anything new from it, considering it was printed in 1968 and he finished his 4-book, 5-inch thick thesis on designing Francis turbines 6 years earlier. In any case, I loved to turn its pages. I looked at the pictures and read the short paragraphs until I knew most of it by heart. First few chapters at least, where the book explains the basics like current, voltage and resistance with simple water analogies. There, almost each paragraph had an illustration that was just serious enough not to appear overly childish and funny enough to keep it interesting. The book was, after all, targeted at adults. Later chapters went on to describe electric machinery and vacuum tubes with more elaborate mechanical analogies. Judging by the tear-and-wear of the pages, I skipped most of those parts back then. Equations were definitely beyond me at that point, and I'm not sure I even bothered my parents asking about them. In the chapter about hydroelectricity, the Završnica power plant is featured on several occasions. Maybe it was there in the original version of the book. Or, more likely, the illustrations were adapted when the book was translated. Regardless, Završnica was the first public power plant in the region, so it definitely deserved the attention. By the time this book was published, it was already more than 50 years old. For a long time, if someone would ask me, that plant would be the only one I could name. I didn't know where it was, but the name has definitely stuck in my head. Even a month ago I wouldn't know where to put it exactly on the map. I was therefore a bit surprised when I found out that the plant is now being converted into a museum and that I will see it on my visit of HE Moste. I now know that the dam on river Završnica is a short hike from the town of Žirovnica and is surrounded by a pleasant recreational park. I learned that the pressure pipeline goes under the town and discharges into river Sava below. And I also learned that the prominent building on the top of the hill you see when driving on the Gorenjska highway is its surge tank. Even though machinery in the old turbine hall is being cut open for display, the surge tank above still serves its original purpose. From up close it is an impressive monument to early 20th century hydro engineering. A walk through the museum revealed many sights that were familiar to me from the book, like the mechanical frequency meter above. I don't think I ever saw a real one before. What I also learned on the tour is that HE Moste next door was my grandfather's first big design project at Litostroj. The original bronze Francis turbines dimensioned by him and cast by Litostroj have long been replaced, damaged by cavitation and sand particles carried from the mountains by river Sava. However one of them is now proudly displayed on a plinth in the park in front of the plant. After HE Moste, my grandfather went on to design power plants throughout the former Yugoslavia and abroad. His design bureau was involved in projects all over the world. He kept a globe in his office marked with flight paths of his intercontinental flights that circled the Earth. The visit to HE Moste and HE Završnica last month has been as much a technical interest for me as it was a way to remember my grandfather. Without doubt he helped spark my interest for engineering. Either by letting me browse his books or watch him spend his days drawing carefully calculated lines on translucent paper. He died in 2011 and was designing turbines in his home office for as long as he could hold a pen against a drafting table. His cottage is gone as well and Elektrotehnika v slikah is now standing on a bookshelf in my living room. It was nice to see in person one of more than a hundred power plants he helped design during his career that are still producing electricity. Posted by | Categories: Life | Comments » Visiting HE Moste 22.06.2014 15:09 When you're driving from central Slovenia towards the mountains, the Gorenjska highway crosses the valley of the Sava river. From the viaduct you can see a high dam wedged between sides of a narrow gorge. Behind it is the water reservoir for the Hidroelektrarna Moste. I've been watching this dam every time I was traveling on that road. For years I wanted to see it up close and the power plant below it. My wish came true when my mum got a contact at the plant and arranged for a guided tour. So my parents and I drove up to Žirovnica last week and visited the facility. To my surprise, turbines and the generator hall of the power plant are actually located quite a bit down river from the dam, not directly underneath it as I expected. Water from river Sava is routed through a tunnel under the nearby town Moste, from which the facility also got its name. What you see above is the steep railway with which heavy machinery has been lowered into the valley during construction. This safety valve on the high-pressure pipe in the tunnel was the first impression of the scale of engineering of this place. The valve is designed to operate in a fail-safe manner: in case of an emergency, it uses stored potential energy without the need for any external power. The huge red weight shuts off the water supply if electric power is lost or if sensors detect flooding in the facility. Later on in the generator hall we saw emergency buttons similar to fire alarms that would manually trigger it. Behind the valve is a huge vertical surge tank embedded in rock. Its purpose is to absorb the kinetic energy of the water in the pipeline which could cause damage if the valve would suddenly close. Even though around 20 m3 of water were flowing per second through the large pipe, there was surprisingly little sound to be heard. The site is actually home to two power plants: In 1915 Hidroelektrarna Završnica was built here to become the first public power plant in the area. It used water from the river Završnica which was routed from a reservoir higher up in the mountains and discharged into the river Sava. Later on, river Sava was dammed in 1952 and Hidroelektrarna Moste built alongside the old power plant. Now HE Završnica is no longer in use and is being slowly converted to a museum. Its water supply however has been routed to one of the turbines in HE Moste and is still used intermittently to generate electricity. This is one of the three 10 MW Francis turbines currently in operation. In contrast to the quiet flow of water in the pipeline, turbine wells were noisy enough that you had to shout to talk to someone. While we were visiting, one of the generators had to be stopped because of a problem with one of the oil pumps. Our tour was put on hold while repairs were made. After the pump was fixed, the turbine was spun up, generator synchronized with the grid and control of the power plant handed back to the remote operations center in Ljubljana. This is one of the modern hydraulic turbine speed governors that are currently in use in the power plant. All aspects of the power plant are remotely monitored using a SCADA system. Status of every temperature sensor and pump can be accessed from a central control room. Apart from electrical parameters they also measure and record structural status of the dam and its surroundings. They have automatic strain gauges and a grid of reference points where geometers regularly check for any unexpected earth movements. In theory the plant could be operated entirely by remote control, but we were told that the company will continue to keep the site staffed round-the-clock. Problems can be detected and solved faster and cheaper if experienced engineers are around. Otherwise a maintenance team would have to be dispatched from somewhere else, which could lead to more downtime or a small problem growing into a more expensive one. In conclusion, I would like to thank the friendly staff of HE Moste for taking the time for us in a busy day and Mr. Pirjevec for guiding us on this tour. We were shown every nook and cranny of the power plant and he gave us a thorough description of the machinery and answered every question we had. It was a pleasant and informative way to spend a morning and a welcome step away from all the low-power electronics I deal with each day. Posted by | Categories: Life | Comments » vesna-drivers git visualization 16.06.2014 17:41 Further in the context of two years in development of firmware for VESNA sensor nodes in Logatec, here's another view on the firmware. I used git-big-picture to graph the branching and merging of the source code. We use a private GitHub repository to collaborate on the code. At the time of writing, it had 16 forks and 7 contributors to the master branch. Before that we used Subversion, but switched to git soon after I joined the team. Red are commits pointed to by tags, blue are branch heads and white are merge and bifurcation commits. Other uninteresting commits are not shown - zero or more intermediary commits are implied by graph edges. Time, or rather entropy, roughly increases from left to right. Below is a detail from that picture. If you're curious, you can also download the complete graph as a rather large PDF (most branch names and tags have been redacted though). At the first glance, this looks pretty chaotic. Definitely our academic environment is a bit less strict regarding the code structure than what you might see in a production project. That's not necessarily a bad thing. Many people here are researchers first and software developers second. For many, this has been their first encounter with source version control. On the other hand, the whole point of this repository is that work can be shared. Pieces that have been useful in one project are often useful again in another. Searching 16 repositories and countless branches for a driver you might reuse isn't very fun. So some kind of structure is a must. It's hard to get this balance right tough. On one hand you don't want to be too strict when accepting code to the git master, since then you have less code to share. Often it's even impossible for the reviewer to run-test the code since he might not have the hardware necessary. On the other hand, merging code that will be a maintenance hell later on is counter productive as well. There's no use trying to share code that will cost people more time to debug it than it would to rewrite it from scratch. We're currently trying to go with a system of GitHub pull requests and a Wiki page that lists all the projects in private branches and I think setting up automated builds was worth the effort. But I guess after two years we're still trying to find the sweet spot. Posted by | Categories: Code | Comments » Evolution of VESNA firmware size 11.06.2014 21:23 Yesterday I got an idea to plot how the size of the firmware images for VESNA sensor nodes evolved over time. Thanks to my diligent tagging of releases in git and making sure binaries can be built with a single make, all it took was a short bash script to come up with this: Only now do I realize that we've been polishing this code base for two years now. When we originally started working on firmware that would run on spectrum sensing nodes in the Logatec testbed, a decision was made to develop everything from scratch and not go with an existing operating system like Contiki. The rationale was that we don't need all of its facilities and making something from scratch will be simpler than learning and building on existing work. As it usually happens in such cases, over time we basically developed our own, small operating system. Given all the invested time, it is now hard to make a break from it, even when we have applications that would benefit from a standard platform like Contiki. Looking at the graph, I'm actually surprised that the size of the firmware didn't increase more than it has. Keep in mind that these binary images are uploaded over a flaky ZigBit network where the best throughput is in the hundreds-of-bytes-per-second range. From the upload times to 50 nodes it certainly felt like it has increased a lot. I didn't look into what features caused the most size increase. I'm pretty sure the recent large jump between versions 2.40 and 2.42 was because of a new SPI and microSD card driver. Also, one of the size decreases early on was after we added -ffunction-sections and -fdata-sections options to the GCC. Posted by | Categories: Code | Comments » Testing VESNA's power supply 08.06.2014 18:22 Now that I have Re:load, I seem to end up checking every power supply that lands on my desk if it meets its specifications. I put VESNA's to the test yesterday. VESNA core board has a switching power supply that supplies around 5V and 3.3V to any expansion boards connected to it. The source can be a battery, solar cell, USB cable or a DC voltage from some external supply. I tested it with a 12V external supply, which is the most common case when you power a node from the grid using a wall wart or something like that. VCC pin on the expansion connector supplies 3.3V. This line also powers VESNA's main ARM CPU. Datasheet says it can supply at most 500 mA to the expansion board and this is approximately what I've also seen in my test. With a setting on Re:load higher than 500 mA, the voltage fell sharply to around 2 V where Re:load wasn't acting as a current source anymore. I've measured the voltage using my oscilloscope, so the resolution on the vertical axis isn't as good as it could be. Still, I think 40 mΩ is a fair estimate of the internal resistance for VCC. Voltage on the VPP pin is typically around 4.5 V. This pin is also supposed to supply a maximum of 500 mA to the expansion board. In my test it managed just a little bit below that, but considering the accuracy of my measurements that's within the margin of error. I also checked the ripple on both VCC and VPP pins. With low loads the power supply seems to operate in discontinuous mode and the ripple is a bit high at 100 mV peak-to-peak. With higher loads, it goes into continuous mode and the peak-to-peak voltage falls. This is how it looks like on the VPP pin with near maximum load: So, I'm happy to say that everything looks here as it should. The ripple is a bit high for my taste, especially when powering analog electronics. Part of why I tested this is because my new UHF receiver will put a higher load on this power supply than other expansions I've worked with on VESNA. With around 350 mA of load my board puts on the VPP line, it looks like VESNA will be able to power it without problems. It won't be able to power two receivers at once however and some auxiliary power supply will be necessary for that. Posted by | Categories: Analog | Comments » On ICT Seminars at IPS 05.06.2014 1:04 Today was the last day of seminars on Information and Communication Technologies for this year at the Jožef Stefan International Postgraduate School. I believe I managed to attend 77.7% of the 18 talks given by other PhD students and gave one short presentation on spectrum sensing. That should bring me above the mandatory attendance with a sufficient margin of error. With a few exceptions, most of these talks were wrist-cuttingly boring. Considering that the final conclusion was that this year's presentations were better than usual I dread to think what previous years had to endure. It was suggested to me that I might not understand all the finer nuances of the pedagogic process. However I still believe that if students are giving these talks to learn how to a present their research topic, more realistic feedback on their performance might be helpful. So here is mine. I think two mistakes were prevalent: First was gross mismatch between audience and the basic knowledge required to follow presentations. ICT field of study at this school is so broad that you will have someone parsing tweets about celebrities on one side of the classroom, someone working on protein databases in the center and someone doing motor bearing fault prediction on the other side. As an electronics engineer I had the misfortune of acquainting myself with sentiment analysis before. Still it doesn't make sense to talk to me about Segmented Discourse Representation Theory if you can't introduce it in a way that someone who has not been studying it for the past 6 months can understand. Personally, I like best the format where presentation is roughly split into three parts: the first one can be followed by anyone with an elementary education, second one by someone familiar with the field and third one by your supervisor and colleagues from your research group. I find that I can follow such presentations with interest even when topic is completely outside of my specialties. I realize that with the suggested 15 - 30 minute length of these ICT seminars this might not be possible. But I think it's better to drop the last third than the first. Your supervisor already knows what you are doing and will skip the talk anyway. Others can read your paper. "Because Magic" by Egophiliac And that brings me to the other problem I noticed. I know that it is the de facto standard that academic slides are walls of text and are expected to stand alone relatively well without the accompanying speech (as much as I like LaTeX, Beamer was a terrible invention). I also know I enjoy every talk that breaks this mold. Don't recite a table of contents of your talk at the beginning. Make slides colorful - you're not paying Springer's color print fees here. Explain the topic using examples, plots, photographs. Don't fill up slides with 10 pt text that I can't even read from the back row. Use slide notes if the slide deck must be usable as a stand-alone publication (by the way, it doesn't in these seminars - the school doesn't even publish slides on the web). Presentations in an academic setting certainly must be on a much higher level than your usual marketing pitch with stock photos, cute kittens and a stevejobsian act, but that doesn't mean they must make me sorry I didn't rather spend the afternoon debugging some PHP code. In conclusion, I think everyone would be better off if these seminars would be given a bit more exposure. Obviously there is a lot of interesting research being done in the offices at our Institute. But as long as presenting it is viewed strictly as a formality and there is no push towards teaching people how to talk about their work in an understandable way, it will stay behind those closed lab doors. Presenting scientific discoveries to the public can be done by postgraduate students at informal seminars as well as by big-name professors with 3-hour extravaganzas in the large auditorium. Maybe if that would be the case, the school wouldn't need mandatory attendance and enforce one (1) mandatory insightful question per student after the talk to give an impression of an academic debate. We might even get some of that much-sought-after cooperation between departments. Posted by | Categories: Ideas | Comments » Re:load 2 28.05.2014 23:04 One thing I was missing on my table was an adjustable constant-current load. I occasionally repair small power supplies and having a robust load to test them is quite handy. I have a drawer full of high-power ceramic resistors, but those are clumsy to handle, especially when they get too hot to touch. For a while I've been planning to make one myself. I have a finished schematic hanging on the wall for a battery powered device using a micro-power op-amp and an old passive heat sink salvaged from an old Radeon. I just never came around to finish a PCB layout for it. Then I came across the Re:load 2. It looked better than what I was making, so I filed away my design and ordered one instead. It's nice being a shopper on Tindie instead of a seller for once. The build instructions were quite clear and there's not much assembly required anyway. I ordered the version with the highest power (6 A and 20 W) and I got the PCB pre-assembled with SMD components. The Arachnid Labs shop points to an instruction manual that describes soldering through-hole components, which was not necessary in my case. Re:load comes without an enclosure and the bare circuit seemed a bit awkward to use, with the tiny pot and current sense wires close to the big load terminals. I wanted it to stand on its own on my table, so I fashioned a simple stand from a scrap piece of aluminum I found in my father's workshop. I connected the load and the current sense wires to terminals on the front panel. I also found a matching 10 kΩ potentiometer with a knob for setting the current. Eventually I want to also add a connector for external power supply and a switch instead of the solder jumper that's on the PCB. I didn't have one at hand when I was first assembling it though so it's missing here. Mounting the enclosure directly to the heat sink makes sense from the mechanical point of view, but it also means the whole thing gets uncomfortably hot under load. Unfortunately that was the only obvious solution. The four 3 mm mounting holes on the Re:load's PCB turned out to be useless for actually mounting the thing. SMD components are too close to the holes to accommodate a spacer or a M3 nut. As far as I have tested it, Re:load 2 seems to work as advertised. I haven't noticed any drift in current I could notice with my multimeter when Re:load is heating up. I did notice though that with the 6 A range it gets hard to set currents below 1 A even with the large knob I added. A fine-adjustment pot might be handy in those cases. I haven't tested the thermal protection feature. I have looked up its design though - there are no obvious components doing the advertised thermal shutdown visible on the board or the schematic. The secret turns out to be in the BTS117 component. What looks like an ordinary MOSFET in a TO-220 package is in fact a linear integrated circuit with a power MOSFET and all sorts of protection functionality. Here's the datasheet if you're interested. In conclusion, at the first glance Re:load 2 seems to be exactly what it says it is. At$30 I paid with shipping to Slovenia it's also quite cheap. Even if I just count the material, I doubt I would get below that if I would make my own from scratch.

Only time will tell if it's also as indestructible as it claims to be. Considering what kind of hardware ends up on my desk I don't think I'll have to wait long to put that to the test.

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Balanced variable phase shift circuit

13.05.2014 14:28

While working on the new UHF receiver for VESNA, I came across a problem when I wanted to correct for a delay in a 16 MHz sine wave signal. The idea was to have a circuit where you could adjust the phase shift by turning a trimmer of some sort. Delaying a signal of single frequency is relatively simple and shouldn't involve delay lines or other such unusual components.

While searching for circuits that would fit this purpose I came across the single transistor phase shifter. While it isn't directly applicable here, it did give me an idea. Signals in my circuit are balanced, which means that for every signal you have the inverse signal available as well. This fact removes the need for the transistor that only serves as a way to invert the signal.

This line of thinking led me to the following a circuit:

In a single-ended RC circuit the gain as well as phase delay varies when you change the time constant RC. The very nice thing about this balanced version however is that its response only varies in phase. The absolute value of gain remains 1 for the complete range.

You can verify that from the expression for the complex gain:

\frac{U_{out}}{U_{in}} = 2 \frac{j\omega R C}{j\omega R C + 1} - 1

The characteristic value for the circuit is the normalized angular frequency ωRC. Here is the relationship between it and the signal phase shift Δφ.

Note that you can affect the phase by changing either capacitance or resistance. I've chosen a variable capacitor for my circuit because trimmer capacitors characterized for high frequencies are simpler to find. Small variable resistors seem to be mostly designed for low frequency signals and don't have defined characteristics for higher frequencies.

You can also make a similar LR circuit, but tunable inductors are even rarer these days.

From the graph above it looks like you could achieve any phase shift for any frequency with this circuit. In reality however several factors limit the usable range.

The maximum phase shift is limited by how low you can get your time constant RC. With capacitances below 1 pF stray effects of the circuit board start to get significant. On the other end, you are limited by the circuit's input impedance Zin. Typically the lower bound is dictated by whatever is driving the circuit.

Z_{in} = R + \frac{1}{j\omega C} = R\left(1 + \frac{1}{j\omega R C}\right)

This expression shows that the impedance is lowest for the lowest phase shift and that the chosen resistance value directly affects Zin. Therefore in general, you want to keep the range of capacitances as low as you can and keep the constant resistance high.

To illustrate, here are usable ranges for phase shift Δφ for frequencies between 1 MHz and 1 GHz and three different lower bounds on Zin. For the range of capacitance values I used a common trimmer capacitor.

In conclusion, this circuit can be quite useful when you are dealing with balanced signals, but you need to drive it from a low-impedance source to have a wide setting range. For electronic phase adjustment I guess a varactor diode could also be used instead of a trimmer capacitor.

Unfortunately, I had to leave this part out of my final design because I ran out of circuit board real-estate for an additional voltage-follower and trimmers. I'm describing it here however, because I'm sure it will come handy in the future, perhaps as an add-on daughterboard for the receiver (I left provisions for that).

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